on x86, can confirm, whether or not 0 displacement jump (i.e. jump doesn't alter values in cs or ip) clears instruction prefetch queue?
a jump next statement have been executed anyways clear instruction prefetch queue on intel x86 cpu has one. common in self-modifying code in order ensure modified code executed. intel has gone far document using jump means ensure self-modified code gets executed correctly on modern cpus.
from intel 64 , ia-32 architectures software developer’s manual volume 3: system programming guide:
8.1.3 handling self- , cross-modifying code
...
as processor microarchitectures become more complex , start speculatively execute code ahead of retirement point (as in p6 , more recent processor families), rules regarding code should execute, pre- or post-modification, become blurred. write self-modifying code , ensure compliant current , future versions of ia-32 architectures, use 1 of following coding options:
(* option 1 *) store modified code (as data) code segment; jump new code or intermediate location; execute new code;
(option 2 use serializing instruction instead of jump, these don't exist on x86 cpus.)
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